View LC75754M_259953.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Ordering number : EN5950
CMOS IC
LC75754M
1/3 Duty VFD Driver
Overview
The LC75754M is a 1/3 duty VFD driver that can be used for electronic tuning frequency display and other applications under the control of a microcontroller. This product can directly drive VFDs with up to 72 segments.
Package Dimensions
unit: mm 3129-MFP36S
[LC75754M]
Features
* 72 segment outputs. * Noise reduction circuits are built into the output drivers. * Serial data input supports CCB format communication with the system controller. * Dimmer can be controlled by serial data input. * High generality since display data is displayed without the intervention of a decoder. * All segments can be turned off with the BLK pin.
Specifications
Absolute Maximum Ratings at Ta = 25C, VSS = 0V
Parameter Maximum supply voltage Symbol VDD max VFL max VIN1 VIN2 VOUT1 VOUT2 IOUT1 IOUT2 Pd max Topr Tstg VDD VFL DI, CL, CE, BLK OSCI S1 to S24, G1 to G3 OSCO S1 to S24 G1 to G3 Ta = 85C Conditions
SANYO: MFP36S
Ratings -0.3 to +6.5 -0.3 to +21.0 -0.3 to +6.5 -0.3 to VDD +0.3 -0.3 to VFL +0.3 -0.3 to VDD +0.3 6 60 300 -40 to +85 -50 to +150
Unit V V V V V V mA mA mW C C
Input voltage
Output voltage
Output current Allowable power dissipation Operating temperature Storage temperature
* CCB is a trademark of SANYO ELECTRIC CO., LTD. * CCB is SANYO's original bus format and all the bus addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
101698RM (OT) No. 5950-1/10
LC75754M Allowable Operating Ranges at Ta = -40 to +85C, VDD = 4.5 to 5.5V, VSS = 0V
Parameter Symbol VDD VFL VIH1 VIH2 VIL fOSC ROSC COSC toL toH tds tdh tcp tcs tch tc VDD VFL DI, CL, CE, BLK OSCI DI, CL, CE, BLK, OSCI OSCI, OSCO OSCI, OSCO OSCI, OSCO CL : Figure 1 CL : Figure 1 DI, CL : Figure 1 DI, CL : Figure 1 CE, CL : Figure 1 CE, CL : Figure 1 CE, CL : Figure 1 BLK, CE : Figure 3 Conditions Ratings min 4.5 8 0.8 VDD 0.8 VDD 0 0.9 2.2 15 160 160 160 160 160 160 160 10 2.4 12 33 typ 5.0 12 max 5.5 18 5.5 VDD 0.2 VDD 3.7 47 100 Unit V V V V V MHz K pF ns ns ns ns ns ns ns s
Supply voltage
Input high-level voltage Input low-level voltage Guaranteed oscillator range Recommended external resistance Recommended external capacitance Low level clock pulse width High level clock pulse width Data setup time Data hold time CE wait time CE setup time CE hold time BLK switching time
Electrical Characteristics in the Allowable Operating Ranges
Parameter Symbol IIH1 IIH2 IIL VOH1 Output high-level voltage VOH2 VOH3 Output low-level voltage Oscillator frequency Hysteresis voltage Current drain VOL1 VOL2 fOSC VH IDD Conditions DI, CL, CE, BLK : VIN = 5.5V OSCI : VIN = VDD DI, CL, CE, BLK, OSCI : VIN = 0 V S1 to S24 : IO = -2 mA G1 to G3 : IO = -50 mA OSCO : IO = -0.5 mA S1 to S24, G1 to G3 : IO = 50 A OSCO : IO = 0.5 mA ROSC = 12k, COSC = 33 pF DI, CL, CE, BLK Output open : fOSC = 2.4MHz 2.4 0.1 VDD 10 -5 VFL - 0.6 VFL - 1.3 VDD - 2.0 0.5 2.0 Ratings min typ max 5 5 Unit A A A V V V V V MHz V mA
Input high-level current Input low-level current
* When CL is stopped at the low level
* When CL is stopped at the high level
Figure 1
No. 5950-2/10
LC75754M Pin Assignment
Block Diagram
Pin Functions
Pin No. 4 32 29 31 30 Pin VFL VDD VSS OSCI OSCO Function Driver block power supply. A voltage of between 8.0 and 18.0 V must be supplied. Logic block power supply. A voltage of between 4.5 and 5.5 V must be supplied. Power supply. Must be connected to the system ground. Oscillator connection. An oscillator circuit is formed by connecting an external resistor and capacitor to these pins. Display off control input. BLK = L (VSS) ...........Display off (S1 to S24, G1 to G3 = L) BLK = H (VDD) ..........Display on Note that serial data can be transferred while the display is turned off. Serial data transfer inputs. These pins must be connected to the system microcontroller. CL : Synchronization clock DI : Transfer data CE : Chip enable I O O GND OPEN OPEN I/O -- -- -- I O Handling when unused -- -- -- GND OPEN
33
BLK
I
GND
35 36 34 1 to 3
CL DI CE
G1 to G3 Digit outputs. The frame frequency fo is (fOSC/6144)Hz.
28 to 5 S1 to S24 Segment outputs for displaying the display data transferred by serial data input
No. 5950-3/10
LC75754M Serial Data Transfer Format * When CL is stopped at the low level
CCB address 8 bits
Display data 24 bits
Control data 14 bits
DD 2 bits
CCB address 8 bits
Display data 24 bits
DD 2 bits
CCB address 8 bits
Display data 24 bits
DD 2 bits * : don't care DD : direction data
* When CL is stopped at the high level
CCB address 8 bits
Display data 24 bits
Control data 14 bits
DD 2 bits
CCB address 8 bits
Display data 24 bits
DD 2 bits
CCB address 8 bits
Display data 24 bits
DD 2 bits * : don't care DD : direction data
Figure 2
No. 5950-4/10
LC75754M CCB address : Transfer 11000001B(83H) as shown in Figure 2 DM0 to DM9 : Dimmer data This data controls the duty of the G1 to G3 digit output pins, and consists of 10 bits with DM0 being the LSB. Note that the intensity of the display can be adjusted by controlling the duty of the G1 to G3 digit output pins. The relationship between the dimmer data and the dimmer value is as follows.
DM9 0 0 0 DM8 0 0 0 DM7 0 0 0 DM6 0 0 0 DM5 0 0 0 DM4 0 0 0 DM3 0 0 0 DM2 0 0 0 DM1 0 0 1 DM0 0 1 0 Dimmer value (t4/t3) 0/1024 1/1024 2/1024
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
0 0 1 1
0 1 0 1
1020/1024 1021/1024 1022/1024 Not used
t3, t4 : See Figure 4.
D1 to D24 : Display data for the G1 digit output pin. Dn (n = 1 to 24) = 1 : On Dn (n = 1 to 24) = 0 : Off D25 to D48 : Display data for the G2 digit output pin. Dn (n = 25 to 48) = 1 : On Dn (n = 25 to 48) = 0 : Off D49 to D72 : Display data for the G3 digit output pin. Dn (n = 49 to 72) = 1 : On Dn (n = 49 to 72) = 0 : Off Correspondence between Display Data (D1 to D72) and Segment Output Pins
Segment output pins S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 G1 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 G2 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 G3 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 Segment output pins S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 S23 S24 G1 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 G2 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 G3 D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72
Example : Segment output pin S11 is controlled as follows :
Display data D11 0 0 0 0 1 1 1 1 D35 0 0 1 1 0 0 1 1 D59 0 1 0 1 0 1 0 1 The segments corresponding to the G1, G2, and G3 digit output pins are off The segments corresponding to the G3 digit output pin are on The segments corresponding to the G2 digit output pin are on The segments corresponding to the G2 and G3 digit output pins are on The segments corresponding to the G1 digit output pin are on The segments corresponding to the G1 and G3 digit output pins are on The segments corresponding to the G1 and G2 digit output pins are on The segments corresponding to the G1, G2, and G3 digit output pins are on Segment output pin S11 state
No. 5950-5/10
LC75754M BLK and the Display Control Since the IC internal data (D1 to D72 and the control data) is undefined when power is first applied, the display is off (S1 to S24, G1 to G3 = low) by setting the BLK pin low at the same time as power is applied. Then, meaningless display at power on can be prevented by transferring all 144 bits of serial data from the controller and setting BLK pin high after the transfer completes while the display is off. (See figure 3.) Power Supply Sequence The following sequences must be observed when power is turned on and off. (See Figure 3.) * Power on : Logic block power supply (VDD) on Driver block power supply (VFL) on * Power off : Driver block power supply (VFL) off Logic block power supply (VDD) off
VDD
VFL
BLK
CE Transfer of display and control data Internal data (D1 to D24, control data) Undefined Defined Undefined
Internal data (D25 to D48)
Undefined
Defined
Undefined
Internal data (D40 to D72)
Undefined
Defined
Undefined
ton > 0 toff1 > 0 toff2 > 0 (toff1 > toff2) tc...10 s min
Figure 3
No. 5950-6/10
LC75754M Output Waveforms (S1 to S24)
G1
G2
G3
S1 to S24 output waveforms on G1 side being lighted
S1 to S24 output waveforms on G2 side being lighted
S1 to S24 output waveforms on G3 side being lighted
S1 to S24 output waveform on G1 and G2 sides being lighted
S1 to S24 output waveform on G1 and G3 sides being lighted
S1 to S24 output waveform on G2 and G3 sides being lighted
S1 to S24 output waveform on G1 to G3 sides being lighted
S1 to S24 output waveform on G1 to G3 sides being unlighted
No. 5950-7/10
LC75754M Relationship between Segment and Digit outputs
S1 to S24
Example 1
Example 2
Example 3
Figure 4 * Consider the examples shown in Figure 4, where display data is set up so that the segment outputs S1 to S24 output VSS level on the G1 and G3 digit output timing and VFL level on the G2 digit output timing. (Here, the G2 side being lighted) The relationship between the time t3 and the oscillator frequency fOSC is t3 = 2048/fOSC. * The digit output G1 to G3 waveforms in Example 1 are output when the dimmer data (DM0 to DM9) are set to 3FEH. The relationship between the time t1 and the oscillator frequency fOSC is t1=2/fOSC. Note that the time t1 and the time t2 are the same period in Example 1. * The digit output G1 to G3 waveforms in Example 2 are those when the dimmer data (DM0 to DM9) are set to a smaller value. Although the time t1 does not change, the time t2 becomes longer. When the dimmer data (DM0 to DM9) are set to 1FFH and the oscillator frequency fosc is 2.4 [MHz], then the time t2 is : t2 = t3 - t1 x (1FFH + 1) 1024 = ---- fOSC = 0.43[ms] * When the dimmer data (DM0 to DM9) are set to an even smaller value, the time t2 becomes even longer, as in example 3. Note that the time t1 does not change here, either.
No. 5950-8/10
LC75754M Sample Application Circuit
From the controller
Notes on the Segment and Digit Waveforms
Segment waveform
Digit waveform 1
Digit waveform 2
Figure 5 The segment waveform is distorted by the VFD panel used and the wiring, and furthermore, in the case of being used with essentially no dimming as in the digit waveform 1, as shown in Figure 5, the VFD panel glow dimly. By carefully considering the segment waveform, it can be seen that this problem can be resolved by applying an adequate amount of dimming, as shown in digit waveform 2. Notes on Transferring Display Data from the Controller Since display data is transferred in three operations as shown in Figure 2, we recommend that all display data be transferred within 30 [ms] to prevent degradation of the visual quality of the displayed image.
VFD panel (up to 72 segments)
No. 5950-9/10
LC75754M
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of October, 1998. Specifications and information herein are subject to change without notice. PS No. 5950-10/10

▲Up To Search▲

Price & Availability of LC75754M

	To Download LC75754M Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .